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Source code

AESENC256KL

Perform 14 Rounds of AES Encryption Flow With Key Locker Using 256-Bit Key

stableVMJITAOTinstruction

Encodings

OpcodeInstructionOp/En64-bitCompat/LegacyDescription
F3 0F 38 DE !(11):rrr:bbbAESENC256KL xmm, m512AValidValidEncrypt xmm using 256-bit AES key indicated by han- dle at m512 and store result in xmm.

Operand encoding

Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.

A

  1. modrm.reg lectura y escrituraModRM byte, reg field (bits 5-3)
  2. modrm.rm lecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them

Measured cost

Loading measurements from arch-data...

Flags named

Description

The AESENC256KL1 instruction performs 14 rounds of AES to encrypt the first operand using the 256-bit key indi-

cated by the handle from the second operand. It stores the result in the first operand if the operation succeeds

(e.g., does not run into a handle violation failure).

Operation

AESENC256KL
Handle := UnalignedLoad of 512 bit (SRC); // Load is not guaranteed to be atomic.
Illegal Handle = (

                   HandleReservedBitSet (Handle) ||
                   (Handle[0] AND (CPL > 0)) ||
                   Handle [1] ||
                   HandleKeyType (Handle) != HANDLE_KEY_TYPE_AES256
                   );
IF (Illegal Handle)
    THEN RFLAGS.ZF := 1;
    ELSE
          (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey);
          IF (Authentic == 0)
                THEN RFLAGS.ZF := 1;
                ELSE

                      DEST := AES256Encrypt (DEST, UnwrappedKey) ;
                      RFLAGS.ZF := 0;
          FI;
FI;
RFLAGS.OF, SF, AF, PF, CF := 0;

Flags affected

ZF is set to 0 if the operation succeeded and set to 1 if the operation failed due to a handle violation. The other arithmetic flags (OF, SF, AF, PF, CF) are cleared to 0.

Intel C/C++ compiler intrinsics

AESENC256KL unsigned char _mm_aesenc256kl_u8(__m128i* odata, __m128i idata, const void* h);

Exceptions

Real address mode
#UDIf the LOCK prefix is used. If CPUID.07H.00H:ECX.KEY_LOCKER[23] = 0. If CR4.KL = 0. If CPUID.19H:EBX.AESKLE[0] = 0. If CR0.EM = 1. If CR4.OSFXSR = 0.
#NMIf CR0.TS = 1.
#PFIf a page fault occurs.
#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector. If the memory address is in a non-canonical form.
#SS(0)If a memory operand effective address is outside the SS segment limit. If a memory address referencing the SS segment is in a non-canonical form.
Protected mode
#UDIf the LOCK prefix is used. If CPUID.07H.00H:ECX.KEY_LOCKER[23] = 0. If CR4.KL = 0. If CPUID.19H:EBX.AESKLE[0] = 0. If CR0.EM = 1. If CR4.OSFXSR = 0.
#NMIf CR0.TS = 1.
#PFIf a page fault occurs.
#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector. If the memory address is in a non-canonical form.
#SS(0)If a memory operand effective address is outside the SS segment limit. If a memory address referencing the SS segment is in a non-canonical form.
Virtual-8086 mode
#UDIf the LOCK prefix is used. If CPUID.07H.00H:ECX.KEY_LOCKER[23] = 0. If CR4.KL = 0. If CPUID.19H:EBX.AESKLE[0] = 0. If CR0.EM = 1. If CR4.OSFXSR = 0.
#NMIf CR0.TS = 1.
#PFIf a page fault occurs.
#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector. If the memory address is in a non-canonical form.
#SS(0)If a memory operand effective address is outside the SS segment limit. If a memory address referencing the SS segment is in a non-canonical form.
Compatibility mode
#UDIf the LOCK prefix is used. If CPUID.07H.00H:ECX.KEY_LOCKER[23] = 0. If CR4.KL = 0. If CPUID.19H:EBX.AESKLE[0] = 0. If CR0.EM = 1. If CR4.OSFXSR = 0.
#NMIf CR0.TS = 1.
#PFIf a page fault occurs.
#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector. If the memory address is in a non-canonical form.
#SS(0)If a memory operand effective address is outside the SS segment limit. If a memory address referencing the SS segment is in a non-canonical form.
64-bit mode
#UDIf the LOCK prefix is used. If CPUID.07H.00H:ECX.KEY_LOCKER[23] = 0. If CR4.KL = 0. If CPUID.19H:EBX.AESKLE[0] = 0. If CR0.EM = 1. If CR4.OSFXSR = 0.
#NMIf CR0.TS = 1.
#PFIf a page fault occurs.
#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector. If the memory address is in a non-canonical form.
#SS(0)If a memory operand effective address is outside the SS segment limit. If a memory address referencing the SS segment is in a non-canonical form.

Sources