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BNDCU, BNDCN

Check Upper Bound

stableVMJITAOTinstruction

Encodings

OpcodeInstructionOp/En64-bitCompat/LegacyDescription
F2 0F 1A /rBNDCU bnd, r/m32RMNot encodableValidGenerate a #BR if the address in r/m32 is higher than the upper bound in bnd.UB (bnb.UB in 1's complement form).
F2 0F 1A /rBNDCU bnd, r/m64RMValidNot encodableGenerate a #BR if the address in r/m64 is higher than the upper bound in bnd.UB (bnb.UB in 1's complement form).
F2 0F 1B /rBNDCN bnd, r/m32RMNot encodableValidGenerate a #BR if the address in r/m32 is higher than the upper bound in bnd.UB (bnb.UB not in 1's complement form).
F2 0F 1B /rBNDCN bnd, r/m64RMValidNot encodableGenerate a #BR if the address in r/m64 is higher than the upper bound in bnd.UB (bnb.UB not in 1's complement form).

Operand encoding

Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.

RM

  1. modrm.reg escrituraModRM byte, reg field (bits 5-3)
  2. modrm.rm lecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them

Measured cost

Loading measurements from arch-data...

Description

Compare the address in the second operand with the upper bound in bnd. The second operand can be either a register or a memory operand. If the address is higher than the upper bound in bnd.UB, it will set BNDSTATUS to 01H and signal a #BR exception.

BNDCU perform 1's complement operation on the upper bound of bnd first before proceeding with address comparison. BNDCN perform address comparison directly using the upper bound in bnd that is already reverted out of 1's complement form.

This instruction does not cause any memory access, and does not read or write any flags.

Effective address computation of m32/64 has identical behavior to LEA

Operation

BNDCU BND, reg
IF reg > NOT(BND.UB) Then

    BNDSTATUS := 01H;
    #BR;
FI;

BNDCU BND, mem
TEMP := LEA(mem);
IF TEMP > NOT(BND.UB) Then

    BNDSTATUS := 01H;
    #BR;
FI;

BNDCN BND, reg
IF reg > BND.UB Then

    BNDSTATUS := 01H;
    #BR;
FI;


BNDCN BND, mem
TEMP := LEA(mem);
IF TEMP > BND.UB Then

    BNDSTATUS := 01H;
    #BR;
FI;

Intel C/C++ compiler intrinsics

BNDCU .void _bnd_chk_ptr_ubounds(const void *q);

Flags affected

None

Exceptions

Protected mode
#BRIf upper bound check fails.
#UDIf the LOCK prefix is used. If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled. If 67H prefix is not used and CS.D=0. If 67H prefix is used and CS.D=1.
Real address mode
#BRIf upper bound check fails.
#UDIf the LOCK prefix is used. If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled. If 16-bit addressing is used.
Virtual-8086 mode
#BRIf upper bound check fails.
#UDIf the LOCK prefix is used. If ModRM.r/m encodes BND4-BND7 when Intel MPX is enabled. If 16-bit addressing is used.
Compatibility mode
Same exceptions as in protected mode.
64-bit mode
#UDIf ModRM.r/m and REX encodes BND4-BND15 when Intel MPX is enabled. Same exceptions as in protected mode.

Sources