Vesta
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Source code

KNOTW, KNOTB, KNOTQ, KNOTD

NOT Mask Register

stableVMJITAOTinstruction

Encodings

OpcodeInstructionOp/En64-bitCompat/LegacyDescription
VEX.L0.0F.W0 44 /rKNOTW k1, k2RRValidValidBitwise NOT of 16 bits mask k2. OR AVX10.1
VEX.L0.66.0F.W0 44 /rKNOTB k1, k2RRValidValidBitwise NOT of 8 bits mask k2. OR AVX10.1
VEX.L0.0F.W1 44 /rKNOTQ k1, k2RRValidValidBitwise NOT of 64 bits mask k2. OR AVX10.1
VEX.L0.66.0F.W1 44 /rKNOTD k1, k2RRValidValidBitwise NOT of 32 bits mask k2. OR AVX10.1

Operand encoding

Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.

RR

  1. modrm.reg escrituraModRM byte, reg field (bits 5-3)
  2. modrm.rm lecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them

Measured cost

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Description

Performs a bitwise NOT of vector mask k2 and writes the result into vector mask k1.

Operation

KNOTW
DEST[15:0] := BITWISE NOT SRC[15:0]
DEST[MAX_KL-1:16] := 0

KNOTB
DEST[7:0] := BITWISE NOT SRC[7:0]
DEST[MAX_KL-1:8] := 0

KNOTQ
DEST[63:0] := BITWISE NOT SRC[63:0]
DEST[MAX_KL-1:64] := 0

KNOTD
DEST[31:0] := BITWISE NOT SRC[31:0]
DEST[MAX_KL-1:32] := 0

Intel C/C++ compiler intrinsics

KNOTW __mmask16 _mm512_knot(__mmask16 a);

Flags affected

None.

SIMD Floating-Point Exceptions

None.

Other Exceptions

See Table 2-65, "TYPE K20 Exception Definition (VEX-Encoded OpMask Instructions w/o Memory Arg)."

Sources