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Source code

NEG

Two's Complement Negation

stableVMJITAOTinstruction

Encodings

OpcodeInstructionOp/En64-bitCompat/LegacyDescription
F6 /3NEG r/m8MValidValidTwo's complement negate r/m8.
F7 /3NEG r/m16MValidValidTwo's complement negate r/m16.
F7 /3NEG r/m32MValidValidTwo's complement negate r/m32.
REX.W + F7 /3NEG r/m64MValidNot encodableTwo's complement negate r/m64.

Operand encoding

Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.

M

  1. modrm.rm lectura y escrituraModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them

Measured cost

Loading measurements from arch-data...

Flags named

Description

Replaces the value of operand (the destination operand) with its two's complement. (This operation is equivalent to subtracting the operand from 0.) The destination operand is located in a general-purpose register or a memory location.

This instruction can be used with a LOCK prefix to allow the instruction to be executed atomically.

In 64-bit mode, the instruction's default operation size is 32 bits. Using a REX prefix in the form of REX.R permits access to additional registers (R8-R15). Using a REX prefix in the form of REX.W promotes operation to 64 bits. See the summary chart at the beginning of this section for encoding data and limits.

Operation

IF DEST = 0
    THEN CF := 0;
    ELSE CF := 1;

FI;
DEST := [ (DEST)]

Flags affected

The CF flag set to 0 if the source operand is 0; otherwise it is set to 1. The OF, SF, ZF, AF, and PF flags are set according to the result.

Exceptions

Protected mode
#GP(0)If the destination is located in a non-writable segment. If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit. If the DS, ES, FS, or GS register contains a NULL segment selector.
#SS(0)If a memory operand effective address is outside the SS segment limit. #PF(fault-code) If a page fault occurs.
#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.
#UDIf the LOCK prefix is used but the destination is not a memory operand.
Real address mode
#GPIf a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
#SSIf a memory operand effective address is outside the SS segment limit.
#UDIf the LOCK prefix is used but the destination is not a memory operand.
Virtual-8086 mode
#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.
#SS(0)If a memory operand effective address is outside the SS segment limit. #PF(fault-code) If a page fault occurs.
#AC(0)If alignment checking is enabled and an unaligned memory reference is made.
#UDIf the LOCK prefix is used but the destination is not a memory operand.
Compatibility mode
Same as for protected mode exceptions.
64-bit mode
#SS(0)If a memory address referencing the SS segment is in a non-canonical form.
#GP(0)If the memory address is in a non-canonical form. #PF(fault-code) For a page fault.
#AC(0)If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.
#UDIf the LOCK prefix is used but the destination is not a memory operand.

Sources