NOP

No Operation

stableVMJITAOTinstruction

Encodings

OpcodeInstructionOp/En64-bitCompat/LegacyDescription
NP 90NOPZOValidValidOne byte no-operation instruction.
NP 0F 1F /0NOP r/m16MValidValidMulti-byte no-operation instruction.
NP 0F 1F /0NOP r/m32MValidValidMulti-byte no-operation instruction.

Operand encoding

Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.

M

  1. modrm.rm lecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them

Measured cost

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Description

This instruction performs no operation. It is a one-byte or multi-byte NOP that takes up space in the instruction stream but does not impact machine context, except for the EIP register.

The multi-byte form of NOP is available on processors with model encoding:

The multi-byte NOP instruction does not alter the content of a register and will not issue a memory operation. The instruction's operation is the same in non-64-bit modes and 64-bit mode.

Operation

The one-byte NOP instruction is an alias mnemonic for the XCHG (E)AX, (E)AX instruction.

The multi-byte NOP instruction performs no operation on supported processors and generates undefined opcode
exception on processors that do not support the multi-byte NOP instruction.

The memory operand form of the instruction allows software to create a byte sequence of "no operation" as one
instruction. For situations where multiple-byte NOPs are needed, the recommended operations (32-bit mode and
64-bit mode) are:

                   Table 4-12. Recommended Multi-Byte Sequence of NOP Instruction

Length             Assembly                                                Byte Sequence
2 bytes            66 NOP                                                  66 90H
3 bytes            NOP DWORD ptr [EAX]                                     0F 1F 00H
4 bytes            NOP DWORD ptr [EAX + 00H]                               0F 1F 40 00H
5 bytes            NOP DWORD ptr [EAX + EAX*1 + 00H]                       0F 1F 44 00 00H
6 bytes            66 NOP DWORD ptr [EAX + EAX*1 + 00H]                    66 0F 1F 44 00 00H
7 bytes            NOP DWORD ptr [EAX + 00000000H]                         0F 1F 80 00 00 00 00H
8 bytes            NOP DWORD ptr [EAX + EAX*1 + 00000000H]                 0F 1F 84 00 00 00 00 00H
9 bytes            66 NOP DWORD ptr [EAX + EAX*1 + 00000000H]              66 0F 1F 84 00 00 00 00 00H

Flags affected

None.

Exceptions

Real address mode
#UDIf the LOCK prefix is used.
Protected mode
#UDIf the LOCK prefix is used.
Virtual-8086 mode
#UDIf the LOCK prefix is used.
Compatibility mode
#UDIf the LOCK prefix is used.
64-bit mode
#UDIf the LOCK prefix is used.

Sources