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Source code

PINSRW

Insert Word

stableVMJITAOTinstruction

Encodings

OpcodeInstructionOp/En64-bitCompat/LegacyDescription
NP 0F C4 /r ib1PINSRW mm, r32/m16, imm8AValidValidInsert the low word from r3 or from m16 into mm at the word position specified by imm8.
66 0F C4 /r ibPINSRW xmm, r32/m16, imm8AValidValidMove the low word of r3 or from m16 into xmm at the word position specified by imm8.
VEX.128.66.0F.W0 C4 /r ibVPINSRW xmm1, xmm2, r32/m16, imm8Bv2ValidInsert the word from r32/m16 at the offset indicated by imm8 into the value from xmm2 and store result in xmm1.
EVEX.128.66.0F.WIG C4 /r ibVPINSRW xmm1, xmm2, r32/m16, imm8CValidValidInsert the word from r32/m16 at the offset AVX10.1 indicated by imm8 into the value from xmm2 and store result in xmm1.

Operand encoding

Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.

A

  1. modrm.reg escrituraModRM byte, reg field (bits 5-3)
  2. modrm.rm lecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them
  3. imm8immediate byte after the instruction

B

  1. modrm.reg escrituraModRM byte, reg field (bits 5-3)
  2. vex.vvvv lecturaVEX prefix, vvvv field (inverted)
  3. modrm.rm lecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them
  4. imm8immediate byte after the instruction

C

  1. modrm.reg escrituraModRM byte, reg field (bits 5-3)
  2. evex.vvvv lecturaEVEX prefix, vvvv field (inverted)
  3. modrm.rm lecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them
  4. imm8immediate byte after the instruction

Tupla: Tuple1 Scalar

Measured cost

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Description

Three operand MMX and SSE instructions:

Copies a word from the source operand and inserts it in the destination operand at the location specified with the count operand. (The other words in the destination register are left untouched.) The source operand can be a general-purpose register or a 16-bit memory location. (When the source operand is a general-purpose register, the low word of the register is copied.) The destination operand can be an MMX technology register or an XMM register. The count operand is an 8-bit immediate. When specifying a word location in an MMX technology register, the 2 least-significant bits of the count operand specify the location; for an XMM register, the 3 least-significant bits specify the location.

Bits (MAXVL-1:128) of the corresponding YMM destination register remain unchanged.

Four operand AVX and AVX-512 instructions:

Combines a word from the first source operand with the second source operand, and inserts it in the destination operand at the location specified with the count operand. The second source operand can be a general-purpose register or a 16-bit memory location. (When the source operand is a general-purpose register, the low word of the register is copied.) The first source and destination operands are XMM registers. The count operand is an 8-bit immediate. When specifying a word location, the 3 least-significant bits specify the location.

Bits (MAXVL-1:128) of the destination YMM register are zeroed. VEX.L/EVEX.L'L must be 0, otherwise the instruction will #UD.

Operation

PINSRW dest, src, imm8 (MMX)
    SEL := imm8[1:0]
    DEST.word[SEL] := src.word[0]

PINSRW dest, src, imm8 (SSE)
    SEL := imm8[2:0]
    DEST.word[SEL] := src.word[0]

VPINSRW dest, src1, src2, imm8 (AVX/AVX512)
    SEL := imm8[2:0]
    DEST := src1
    DEST.word[SEL] := src2.word[0]
    DEST[MAXVL-1:128] := 0

Intel C/C++ compiler intrinsics

PINSRW __m64 _mm_insert_pi16 (__m64 a, int d, int n) PINSRW __m128i _mm_insert_epi16 ( __m128i a, int b, int imm);

Flags affected

None.

Numeric Exceptions

None.

Other Exceptions

EVEX-encoded instruction, see Table 2-22, "Type 5 Class Exception Conditions."

EVEX-encoded instruction, see Table 2-59, "Type E9NF Class Exception Conditions."

Additionally:

#UD                  If VEX.L = 1 or EVEX.L'L > 0.

Sources