SENDUIPI

Send User Interprocessor Interrupt

stableVMJITAOTinstruction

Encodings

OpcodeInstructionOp/En64-bitCompat/LegacyDescription
F3 0F C7 /6SENDUIPI regAValidInvalidSend interprocessor user interrupt.

Operand encoding

Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.

A

  1. modrm.reg lecturaModRM byte, reg field (bits 5-3)

Measured cost

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Description

The SENDUIPI instruction sends the user interprocessor interrupt (IPI) indicated by its register operand. (The operand always has 64 bits; operand-size overrides such as the prefix 66 are ignored.)

SENDUIPI uses a data structure called the user-interrupt target table (UITT). This table is located at the linear address UITTADDR (in the IA32_UINTR_TT MSR); it comprises UITTSZ+1 16-byte entries, where UITTSZ = IA32_UINT_MISC[31:0]. SENDUIPI uses the UITT entry (UITTE) indexed by the instruction's register operand. Each UITTE has the following format:

byte aligned, so bits 69:64 of each UITTE must be 0.)

Each UPID has the following format (fields and bits not referenced are reserved):

more user interrupts in PIR.

should not send notifications when posting user interrupts in this descriptor.

(including SENDUIPI).

bits 47:40 are the 8-bit APIC ID; in x2APIC mode, the entire field forms the 32-bit APIC ID).

user-interrupt request for a vector if the corresponding bit is 1.

Although SENDUIPI may be executed at any privilege level, all of the instruction's memory accesses (to a UITTE and a UPID) are performed with supervisor privilege.

SENDUIPI sends a user interrupt by posting a user interrupt with vector V in the UPID referenced by UPIDADDR and then sending, as an ordinary IPI, any notification interrupt specified in that UPID.

Operation

    IF reg > UITTSZ;
          THEN #GP(0);

    FI;
    read tempUITTE from 16 bytes at UITTADDR+ (reg << 4);
    IF tempUITTE.V = 0 or tempUITTE sets any reserved bit

          THEN #GP(0);
    FI;


read tempUPID from 16 bytes at tempUITTE.UPIDADDR;// under lock
IF tempUPID sets any reserved bits or bits that must be zero

      THEN #GP(0); // release lock
FI;
tempUPID.PIR[tempUITTE.UV] := 1;
IF tempUPID.SN = tempUPID.ON = 0

      THEN
            tempUPID.ON := 1;
            sendNotify := 1;

      ELSE sendNotify := 0;
FI;
write tempUPID to 16 bytes at tempUITTE.UPIDADDR;// release lock
IF sendNotify = 1

      THEN
            IF local APIC is in x2APIC mode
                  THEN send ordinary IPI with vector tempUPID.NV
                        to 32-bit physical APIC ID tempUPID.NDST;
                  ELSE send ordinary IPI with vector tempUPID.NV
                        to 8-bit physical APIC ID tempUPID.NDST[15:8];
            FI;

FI;

Flags affected

None.

Exceptions

Protected mode
#UDThe SENDUIPI instruction is not recognized in protected mode.
Real address mode
#UDThe SENDUIPI instruction is not recognized in real-address mode.
Virtual-8086 mode
#UDThe SENDUIPI instruction is not recognized in virtual-8086 mode.
Compatibility mode
#UDThe SENDUIPI instruction is not recognized in compatibility mode.
64-bit mode
#UDIf the LOCK prefix is used. If executed inside an enclave. If CR4.UINTR = 0. If IA32_UINTR_TT[0] = 0. If CPUID.07H.00H:EDX.UINTR[5] = 0.
#PFIf a page fault occurs.
#GPIf the value of the register operand exceeds UITTSZ. If the selected UITTE is not valid or sets any reserved bits. If the selected UPID sets any reserved bits. If there is an attempt to access memory using a linear address that is not canonical relative to the current paging mode.

Sources