SHA256MSG2
Perform a Final Calculation for the Next Four SHA256 Message Dwords
stableVMJITAOTinstruction
Encodings
| Opcode | Instruction | Op/En | 64-bit | Compat/Legacy | Description |
|---|---|---|---|---|---|
NP 0F 38 CD /r | SHA256MSG2 xmm1, xmm2/m128 | RM | Valid | Valid | Performs the final calculation for the next four SHA256 message dwords using previous message dwords from xmm1 and xmm2/m128, storing the result in xmm1. |
Operand encoding
Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.
RM
modrm.reglectura y escrituraModRM byte, reg field (bits 5-3)modrm.rmlecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them
Measured cost
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Description
The SHA256MSG2 instruction is one of two SHA2 message scheduling instructions. The instruction performs the final calculation for the next four SHA256 message dwords.
Operation
SHA256MSG2
W14 := SRC2[95:64] ;
W15 := SRC2[127:96] ;
W16 := SRC1[31: 0] + 1( W14) ;
W17 := SRC1[63: 32] + 1( W15) ;
W18 := SRC1[95: 64] + 1( W16) ;
W19 := SRC1[127: 96] + 1( W17) ;
DEST[127:96] := W19 ;
DEST[95:64] := W18 ;
DEST[63:32] := W17 ;
DEST[31:0] := W16;Intel C/C++ compiler intrinsics
SHA256MSG2 __m128i _mm_sha256msg2_epu32(__m128i, __m128i);Flags affected
None.
SIMD Floating-Point Exceptions
None.
Other Exceptions
See Table 2-21, "Type 4 Class Exception Conditions."