VUCOMISH
Unordered Compare Scalar FP16 Values and Set EFLAGS
stableVMJITAOTinstruction
Encodings
| Opcode | Instruction | Op/En | 64-bit | Compat/Legacy | Description |
|---|---|---|---|---|---|
EVEX.LLIG.NP.MAP5.W0 2E /r | VUCOMISH xmm1, xmm2/m16 {sae} | A | Valid | Valid | Compare low FP16 values in xmm1 and OR AVX10.1 xmm2/m16 and set the EFLAGS flags accordingly. |
Operand encoding
Each mode is a value of the Op/En column above. It says which field of the encoded instruction carries each operand, in the order they are written, and whether the instruction reads it, writes it or both.
A
modrm.regescrituraModRM byte, reg field (bits 5-3)modrm.rmlecturaModRM byte, r/m field (bits 2-0); with the SIB byte and the displacement when the mod field asks for them
Tupla: Scalar
Measured cost
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Description
This instruction compares the FP16 values in the low word of operand 1 (first operand) and operand 2 (second operand), and sets the ZF, PF, and CF flags in the EFLAGS register according to the result (unordered, greater than, less than, or equal). The OF, SF and AF flags in the EFLAGS register are set to 0. The unordered result is returned if either source operand is a NaN (QNaN or SNaN).
Operand 1 is an XMM register; operand 2 can be an XMM register or a 16-bit memory location.
The VUCOMISH instruction differs from the VCOMISH instruction in that it signals a SIMD floating-point invalid operation exception (#I) only if a source operand is an SNaN. The COMISS instruction signals an invalid numeric exception when a source operand is either a QNaN or SNaN.
The EFLAGS register is not updated if an unmasked SIMD floating-point exception is generated. EVEX.vvvv are reserved and must be 1111b, otherwise instructions will #UD.
Operation
VUCOMISH
RESULT := UnorderedCompare(SRC1.fp16[0],SRC2.fp16[0])
if RESULT is UNORDERED:
ZF, PF, CF := 1, 1, 1
else if RESULT is GREATER_THAN:
ZF, PF, CF := 0, 0, 0
else if RESULT is LESS_THAN:
ZF, PF, CF := 0, 0, 1
else: // RESULT is EQUALS
ZF, PF, CF := 1, 0, 0
OF, AF, SF := 0, 0, 0Intel C/C++ compiler intrinsics
VUCOMISH int _mm_ucomieq_sh (__m128h a, __m128h b);
VUCOMISH int _mm_ucomige_sh (__m128h a, __m128h b);
VUCOMISH int _mm_ucomigt_sh (__m128h a, __m128h b);
VUCOMISH int _mm_ucomile_sh (__m128h a, __m128h b);
VUCOMISH int _mm_ucomilt_sh (__m128h a, __m128h b);
VUCOMISH int _mm_ucomineq_sh (__m128h a, __m128h b);SIMD Floating-Point Exceptions
Invalid, Denormal.
Other Exceptions
EVEX-encoded instructions, see Table 2-50, "Type E3NF Class Exception Conditions."