WBNOINVD
Write Back and Do Not Invalidate Cache
stableVMJITAOTinstruction
Encodings
| Opcode | Instruction | Op/En | 64-bit | Compat/Legacy | Description |
|---|---|---|---|---|---|
F3 0F 09 | WBNOINVD | ZO | Valid | Valid | Write back and do not flush internal caches; initiate writing-back without flushing of external caches. |
Measured cost
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Description
The WBNOINVD instruction writes back all modified cache lines in the processor's internal cache to main memory but does not invalidate (flush) the internal caches.
After executing this instruction, the processor does not wait for the external caches to complete their write-back operation before proceeding with instruction execution. It is the responsibility of hardware to respond to the cache write-back signal. The amount of time or cycles for WBNOINVD to complete will vary due to size and other factors of different cache hierarchies. As a consequence, the use of the WBNOINVD instruction can have an impact on logical processor interrupt/event response time.
The WBNOINVD instruction is a privileged instruction. When the processor is running in protected mode, the CPL of a program or procedure must be 0 to execute this instruction. This instruction is also a serializing instruction (see "Serializing Instructions" in Chapter 9 of the Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3A).
This instruction's operation is the same in non-64-bit modes and 64-bit mode.
Operation
WriteBack(InternalCaches);
Continue; (* Continue execution *)Intel C/C++ compiler intrinsics
WBNOINVD void _wbnoinvd(void);Flags affected
None.
Exceptions
Protected mode
#GP(0) | If the current privilege level is not 0. |
#UD | If the LOCK prefix is used. |
Real address mode
#UD | If the LOCK prefix is used. |
Virtual-8086 mode
#GP(0) | WBNOINVD cannot be executed at the virtual-8086 mode. |
Compatibility mode
| Same exceptions as in protected mode. |
64-bit mode
| Same exceptions as in protected mode. |